Staff ASIC Design Engineer

Redwood City, California

OCTOPYD
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Role Description

One of our partner company is looking for a Staff Chip Design Engineer - AI and ML Integration. In this role, you will help architect, design, and validate advanced semiconductor systems that realize the future of chip design and machine learning. You will utilize your deep expertise in System Verilog and Python to contribute directly to our product development, working alongside a cross-functional team of world-class engineers and researchers. In this company, you'll work at the frontier of AI and semiconductor design-collaborating closely with AI scientists to translate cutting-edge research into production-ready systems.

We're looking for candidates who are passionate about pushing the boundaries of chip design, and excited to work at the intersection of semiconductors and AI.


Key Responsibilities

  • Collaborate closely with cross-functional teams to define system specifications and deliver solutions
  • Architecture and implementation of novel chip design methodologies using Agentic AI
  • Contribute to the development of cutting-edge solutions that integrate machine learning capabilities

Qualifications

  • Bachelor's degree or higher in electrical engineering
  • 10-15 years of experience in RTL design
  • Proficiency in SystemVerilog and Python languages
  • Excellent written and verbal communication skills
  • Comfortable working in a dynamic, research-heavy startup environment
  • Demonstrated coursework or project experience in machine learning and/or deep learning
  • U.S. Citizen, Permanent Resident, or valid work visa

Preferred Qualifications

  • Completion of machine learning or deep learning courses through platforms such as Coursera
  • Personal projects showcasing innovation, creativity, and continuous learning
  • Knowledge of industry-standard communication protocols (SPI, I2C, AXI, Ethernet, PCIe, DDR5, )
  • Knowledge of open-source tools and contribution practices (Verilator, CocoTB, Yosys, )
  • Experience with multiple areas of chip flow (RTL design, validation, synthesis, physical design, )
  • Experience with FPGA development (Vivado, Vitis, Quartus, ACE )

About the company:

We're crafting something fundamental at the intersection of physics, AI, and programming. We are a stealth startup backed by top VCs in the Valley, tackling a challenging problem with a huge opportunity for growth. If you're passionate about solving challenging problems and love the thrill of building groundbreaking solutions in a collaborative environment, we are interested in talking with you. Above everything, we value collaboration and raw talent. Our team members have experience in building startups from scratch to IPO, holding technical leadership roles at top companies like Google and Amazon, and winning medals in international science Olympiads. Despite these achievements, we remain humble and welcome any chance of collaborating with like-minded individuals.


Date Posted: 02 May 2025
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