Position: STA Engineer
Location: San Jose CA (Day-1 Onsite)
What You'll Be Doing:
- Experience with Integration for STA: including Hyperscale and hierarchical analysis with parasitic stitching, IO budgeting, and flat parasitic extraction.
- Timing closure with various timing ECO including transition, setup, hold, noise, crosstalk, and power recovery.
- Familiarity with various on-chip variation including AOCV, POCV and voltage, temperature, aging-based timing derates
- Synthesis Tools: Synopsys DC/DCG/FC.
- Static Timing Analysis & ECO: Synopsys Primetime/PTPX/Tweaker/PrimeClosure, Cadence Tempus.
- Scripting: TCL, Perl, or Python.
This role expects you to be responsible for closing timing at block, sub-chip, and full-chip levels, performing quality checks such as setup, hold, transition, and noise, while managing ECO tasks. Your role may include extraction and STA flow development, convergence strategies
He/She will be using following tools and must posses below experience of tools
- Synopsys Design Compiler
- Synopsys PrimeTime
- Cadence Tempus
What We Are Looking For:
- Degree in Electrical Engineering or Computer Engineering
- 8 years of ASIC STA (Static Timing Analysis) experience
- Ability and willingness to work on-site at the Honeywell Plymouth, MN facility (zip code 55441)
- 5 or more years of experience with digital IC design using Synopsys EDA tools
- Strong scripting language skills - e.g., Perl, Shell, TCL, C
- Strong technical problem-solving skills
- Windows OS and LINUX OS and Microsoft office suite tools proficiency
- Effective and clear communication skills and good ability to work with others
- Work accurately with excellent attention to detail
- Ability to work simultaneously on multiple projects and follow up on responsibilities
- Self-starter who requires minimal oversight
- Experience with Siemens Physical Verification tools and methods
- Radiation effects analysis knowledge/experience
- Advanced node and SOI CMOS technology design experience
What's In It for You:
At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That's why we offer competitive financial compensation, including various compensation plans and a solid benefits package.
- Medical, Dental, Vision Insurance
- 401k, With Matching Contributions
- Short-Term/Long-Term Disability Insurance
- Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
- Paid Time Off (including sick, holiday, vacation, etc.)
- Tuition Reimbursement
- Growth Opportunities
- And more.
Education:
Bachelor's Degree
Work Arrangement Fully On-Site: Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.
Location: Complete On-Site at San Jose CA (Day-1 Onsite)
About eInfochips:
eInfochips, an Arrow company (Fortune ), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow's $38B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow's Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit for our portfolio of product engineering services across various industries & verticals.
EEO Statement:
Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy)