We are looking for experienced Senior SOC-level functional verification Engineers with strong understanding of AXI and High-speed IO protocols like PCIe and USB for our Bangalore team. Does this sound like a good role for you?
- Senior SOC Verification Engineers (Applications Engineering team)
- Experience: 4yrs to 12 years
- Location: Bangalore
- hands-on experience with SoC-level functional verification or Design-for-Test (DFT) or both.
- Good knowledge of AXI, APB
- Background in verification, with at least sub-system level verification
- Debugging abilities to identify issues in functional verification.
- Knowledge of DMA, ideally should have verified a sub-system with DMA
- Knowledge of High-speed IO sub-systems like PCIe and USB
- Knowledge and experience with Memory BIST/DFT/ATE/SLT/any other test solutions
- End to end knowledge of how transactions/data flow between the HSIO interface to/from memory
- Ability to evaluate technical suggestions from customers and work with internal teams (product management/R&D) to make decisions
- Customer facing experience is a plus - educating/guiding customer on technical details of a solution
- Good to have:
- Hands-on debug experience of silicon is a plus
- Detailed knowledge of the PCIe and USB protocols
- Architecture/micro-architecture experience
Please share your updated CV to or refer who would like to explore this opportunity.
- Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, gender identity, age, military veteran status, or disability.