Job Title: Physical Design Engineer
Location: Bengaluru, India
Experience: 4 to 12 Years
Industry: Semiconductor / VLSI / EDA
Job Type: Full-Time
Job Description:
We are seeking experienced Physical Design Engineers to join our growing team in Bengaluru. The ideal candidate will have strong experience in RTL to GDSII implementation, especially at advanced nodes (5nm/3nm) using Cadence Innovus and related toolsets.
Key Responsibilities:
- Complete ownership of physical design tasks from RTL to GDSII.
- Floorplanning, Power planning, Placement, CTS, Routing, and Physical Verification (DRC, LVS).
- Work on PnR (Place & Route) implementation for advanced technology nodes (5nm/3nm).
- Timing closure using STA tools and sign-off.
- Work closely with RTL, DFT, STA, and Physical Verification teams.
- Deliver high-quality designs meeting power, performance, and area (PPA) targets.
- Debug and fix design issues related to congestion, IR drop, EM violations, timing violations, and LVS/DRC issues.
Required Skills & Experience:
- 4 to 12 years of hands-on experience in Physical Design.
- Strong hands-on expertise in Cadence Innovus or equivalent tools.
- Experience in PnR and timing closure at 5nm/3nm nodes (FinFET technologies).
- Solid understanding of floorplanning, power planning, clock tree synthesis, routing, and physical verification.
- Familiarity with scripting (TCL/Perl/Python) for automation.
- Good knowledge of timing analysis using PrimeTime or equivalent.
- Prior experience in working with global teams is a plus.