Senior Hardware Design Engineer

Austin, Texas

Insight Global
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Principal Digital Hardware Engineer

Austin, TX (relocation offered - hybrid: 4 days onsite, 1 day remote)

Duration: Permanent

Salary: 101k-198k (based on experience)


Required Skills & Experience



• Bachelor's degree in Electrical, Computer, or Software Engineering, or a related subject area.
• 5+ years relevant engineering experience in digital hardware design.
• Experience using VHDL and/or System Verilog to implement synthesizable logic targeting FPGAs.
• Experience writing testbenches and simulation models to verify logic designs. Experience using schematic capture and board layout tools.


Nice to Have Skills & Experience



• Experience bringing up prototype hardware.
• Familiar with common clock domain crossing methods.
• Experience with high-speed digital design
• Knowledge of static timing analysis and experience writing timing constraints.
• Familiar with board level signal integrity simulation tools.
• Experience writing and implementing test plans to verify board level digital circuits.
• Familiar with common benchtop instruments such as oscilloscopes, DMMs, function generators, and power supplies.
• Familiar with Xilinx, Intel or Lattice FPGAs and CPLDs, as well as their design tools. Experience collaborating with other technical subject areas, such as Analog, Software, Mechanical, and RF.


Job Description



• Collaborate with multi-disciplinary hardware engineering teams to develop test and measurement products.
• Develop register maps and generate documentation to ensure clear design intent to the broader project team.
• Own the full FPGA design, including logic implementation, data movement and analysis, testbenches, compilation, and timing analysis.
• Own all aspects of digital board level design, including schematic entry, layout guidelines, signal integrity simulations, and prototype validation.
• Develop and carry out plans for prototype hardware bring-up and board level validation. Be the voice of digital design in project meetings by estimating level of effort for design tasks, providing input on status of work, and proactively raising technical concerns.

Date Posted: 02 May 2025
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