Senior Digital Design RTL Engineer Job

Company Description

Job Description

Role: Digital Design (RTL) Engineer

Location: Santa Clara, CA (Remote option available)

Job Type: Contract

Interview: Phone/Skype

We are seeking a seasoned Digital Design Engineer with 10+ years of experience in RTL design using Verilog/System Verilog, skilled in developing micro-architectural documentation, quality checks, and integration support for SoC designers. Preferred skills include Python scripting, low power design (UPF/CPF), and familiarity with Synopsys/Cadence tools.

Qualifications

Additional Information

All your information will be kept confidential according to EEO guidelines.