Senior Design Verification Engineer

Dedham, Massachusetts

Bestinfo Systems LLC
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Senior FPGA Design Verification Engineer Dedham-MA Full-Time (FTE) Direct Hire


Position: Senior FPGA Design Verification Engineer

Job Type: Full-Time (FTE)

Location: Dedham-MA

Base Salary: $180,433 to $190,000 +Best-in-class benefits

Relocation Assistance Available - Yes


What sets you apart:


Experience defining verification methodology for complex FPGAs.

Ability to analyze requirements, create test plan, build and set up scalable simulation environments from the ground up using SystemVerilog/UVM

Familiarity with testing complex designs, code coverage, functional coverage, assertions.

Ability to work in a dynamic environment that includes working with changing needs and requirements.

FPGA/ASIC design experience is a plus.

Familiarity with Xilinx FPGA & Questa Advanced Functional Verification tools is a plus.

Team player who thrives in collaborative environments and revels in team success


Our Commitment to You:


An exciting career path with opportunities for continuous learning and development.

Research oriented work, alongside award winning teams developing practical solutions for our nation's security

Flexible schedules with every other Friday off work, if desired (9/80 schedule)

Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more

See more at


Workplace Options:


This position is fully on-site, you will be a part of the Dedham, MA. Relocation is available.


Skills and Certifications:

Candidate must have a Secret clearance.

Security Clearance Required: Yes


Candidate Details:

Seniority Level - Mid-Senior

Minimum Education - Bachelor's Degree

Willingness to Travel - Occasionally

Date Posted: 24 April 2025
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