Senior Verification Engineer - High-Speed Digital Design
A well-funded semiconductor company is seeking a Senior Verification Engineer to support the development of next-generation digital communication technologies.
This is an exciting opportunity offering the chance to work on advanced, high-performance ASICs targeting data infrastructure, AI systems, and high-speed networking.
Responsibilities would include:
- Leading block-level and system-level verification from planning through coverage closure.
- Developing reusable verification components using SystemVerilog and UVM.
- Writing targeted, self-checking testbenches to validate performance, functionality, and edge cases.
- Collaborating cross-functionally with RTL designers to debug and resolve design issues early in the development cycle.
- Analyzing and tracking functional and code coverage metrics to ensure verification completeness.
Requirements:
- Proven experience in 4+ successful tapeouts
- A history of successfully completing multiple verification cycles, from planning through to silicon.
- Solid understanding of verification methodologies such as UVM
- Familiarity with high-speed protocols like Ethernet or other data-heavy interfaces is preferred.
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