Principal Process Integration Engineer

40 hrs/week, Mon-Fri, 8:30 a.m. - 5:30 p.m. MINIMUM REQUIREMENTS: Must have a Bachelors degree in Electrical Engineering, Chemical Engineering, Material Science, Physics or a related field, and 3 years of experience in a semiconductor engineering role. Must have 3 years of experience in: 300mm semiconductors, specializing in Source-Drain (S/D) Engineering: S/D loop process details and junction design; Designing and utilizing testline/monitoring structures; and Device and yield analysis to identify process weaknesses and opportunities for improvement. Must have 3 years of experience in Technology transfer or process/tool matching. Must have 3 years of experience in at least 3 of the following: Design of Experiment (DOE); Test run and optimize process parameters for new products; Statistical process control; Statistical methods for modeling multivariate data sets. Must have 3 years of experience in at least 3 of the following: wafer cross section techniques; wafer fabrication processes; ion transport phenomena; plasma etching; plasma simulation; semiconductor thin film deposition; Atomic Layer Deposition (ALD); Chemical Vapor Deposition (CVD); Chemical mechanical polish (CMP), Lithography or Plasma Enhanced Chemical Vapor Deposition (PECVD). Must have 3 years of experience in software: JMP. Must have 1 year of experience managing engineering teams. Please email resume to and reference Job 4165.