Principal Digital ASIC Design Engineer with Security Clearance

We are seeking talented and motivated individuals to tackle challenging engineering problems in advanced digital IC design. As a Principal Digital ASIC Designer, you will be responsible for designing high-performance digital ASICs in advanced technologies. You will be responsible for implementing designs from RTL through synthesis. You will work in multi-disciplinary teams with opportunities to learn, grow and contribute to a variety of projects in different application areas. Job Description: Duties/Responsibilities
• Drive solutions to complex problems with limited direction - contribute to requirements development, propose ways forward, and adapt appropriately to changes in requirements.

• Independently performs complex ASIC architectures and designs.

• Provide insight and suggest design modifications based on simulation results.

• Identify program/system-level technical risks and develop and execute mitigation strategies.

• Manage a task with multiple engineers and effectively communicate status to project leadership and customers.

• Mentor less experienced engineers and provide thoughtful, constructive feedback.

• Perform other duties as assigned. Skills/Abilities
• Proficiency in ASIC design, microprocessor programming or embedded computing.

• Understanding of ASIC design and general computer architecture.

• Ability to write detailed design specifications.

• Computer programming and coding abilities.

• Excellent verbal and written communication skills.

• Excellent mathematical skills.

• Excellent organizational skills and attention to detail.

• Excellent time management skills with the proven ability to meet deadlines.

• Strong analytical and problem-solving skills.

• Ability to prioritize tasks.

• Thorough understanding of engineering theories and procedures. Education Requires bachelor's degree in Engineering, or related field. Masters degree preferred. Experience Requires 7-10 years of experience with a bachelor's degree. Additional Job Description:
• Applicants should possess solid skills in front-end digital systems design with experience in design flows from Cadence or Synopsys.
• Be fluent in SystemVerilog, Verilog or VHDL and familiar with LINT, simulation and synthesis.
• Familiarity with architectures for secure systems design, e.g., cryptographic encoders / decoders or tagged processor architectures is a plus.
• Demonstrated experience with successful tape-outs at advanced nodes is desired. Experience leading and managing design teams is also Applicants selected for this position will be required to obtain and maintain a U.S. Security Clearance.