Hardware Emulation Engineer
Revolutionizing computing with cutting-edge hardware and software, this startup led by industry titans and backed by $300 million is redefining the future of AI infrastructure. At the forefront of distributed systems, they are developing a groundbreaking fabric that doubles IO per dollar, addressing critical bottlenecks in next-gen computing workloads.
They are seeking a talented and experienced Hardware Emulation Engineer to build comprehensive emulation frameworks and execute test plans for large-scale networking chips.
Responsibilities:
- Own and maintain emulation infrastructure.
- Own and maintain SoC level emulation models for validating block, subsystem and full chip level designs.
- Enhance emulation methodology, implementing SOTA emulation technologies to improve robusteness, portability and debuggability.
- Work closely with software and firmware teams to facilitate co-emulation and software validation.
- Manage regressions and liaise with vendors to address design synthesis and mapping issues
Qualifications:
- Bachelor's, Master's, or equivalent in Electrical Engineering, Computer Engineering, or Computer Science.
- 10+ years of experience with HW emulation platforms (Palladium, Zebu or Veloce).
- Proficiency in SystemVerilog or similar hardware description language.
- Knowledge of embedded-C and microcontroller programming.
- Experience with high-speed IO protocols such as PCIe, Ethernet or Arm protocols (AXI, AMBA, CHI) is highly advantageous.
Joining this ambitious team in Mountain View shaping the future of technology and pushing the boundaries of tomorrow's infrastructure.