FPGA Design Engineer at Chandler

Indotronix is seeking a Onsite Job - FPGA Design / VHDL Engineer for a Job Opportunity in Chandler, Arizona Onsite Job: FPGA Design / VHDL Engineer Work Location: Chandler, AZ 85286 Duration: 12+ Months Contract Work Schedule: 9/80 Security Clearance: No Bachelors Degree - Must Job Summary In this role, you will identify, investigate, design, and develop programmable logic solutions, in FPGAs or CPLDs, for digital electronic equipment using VHSIC Hardware Description Language (VHDL) to solve a variety of technical challenges. You will test programmable logic designs in the lab using custom and/or industry standard tools and equipment to analyze performance and verify functionality meets established design requirements. Basic Qualifications for Principal Engineer Digital: B.S. degree in Electrical Engineering (Computer or Electrical), or related field with a minimum of 5 years of relevant professional work experience OR a M.S. degree with a minimum of 3 years of relevant professional work experience in EE/CE including experience in programmable logic design. Recent experience with Hardware Description Language (VHDL) and formal verification (OSVVM preferred) for FPGAs, CPLDs and/or ASICs. Ability to work in teams and communicate clearly across various levels of engineers Ability to translate system performance and operational specifications into programmable logic requirements, design specifications, test specifications, and users' guides. Ability to obtain and maintain a Security Clearance Preferred Qualifications: Ability to obtain Active DOD Secret Clearance post start Experience with Electronic Design Automation (EDA) Tools: Mentor Graphics ModelSim/QuestaSim, Radiant (Lattice), Vivado/ISE (Xilinx), Libero (Microsemi). Preferred candidate will have familiarity with: Communication protocols (UART, SPI, I2C, 1-Wire, Ethernet, AXI, APB, SpaceWire); Fixed-point math fundamentals; Static timing analysis and timing closure (setup and hold, slack, skew, etc.); Asynchronous clock domain crossing and general metastability mitigation techniques; Test-bench development, including timing-accurate bus functional models, complete functional coverage, etc. Working in an Agile project format, team-based environment, including Jira and Git environments. Formal verification with OSVVM Indotronix is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, or national origin.