A rapidly expanding, high-speed focused client in the bay area looking to grow their presence. They are seeking a Design Verification to join their growing ASIC Design Team.
Expereince:
- An RTL verification lead to lead the efforts to build UVM verification environment for our Server SoC ASIC.
- Collaborate with RTL design architects and verification engineers to define the higher-level architecture and define the entire verification environment.
- Work with verification engineers to implement and build the test bench(es) and test cases both at the ASIC sub-system level, ASIC Chip-level and System level.
- Work with our design and verification teams spread across Armenia, India, China, and the backend/PR team located in China.