Design Verification Engineer

San Francisco, California

Acceler8 Talent
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Acceler8 Talent is collaborating with one of the most exciting emerging startups developing specialized AI chips optimized for specific model architectures. They are seeking an experienced Design Verification Engineer to join their team.


The company's initial product is focused on transformer models, delivering significantly higher throughput and lower latency than traditional solutions. Their cutting-edge ASIC technology enables groundbreaking applications, such as real-time video generation and advanced deep reasoning capabilities, which would be impractical with standard GPUs.


Key Responsibilities:

  • Develop ASIC testbenches using UVM to verify microchip design functionality.
  • Implement microarchitecture and RTL specifications in System Verilog for AI microchips, including managing test scenarios and coverage plans.
  • Perform functional and performance verification using synthesized netlists, coverage models, and tools such as Synopsys VCS and Verdi, collaborating closely with design and architecture teams.
  • Apply static and dynamic methods for timing closure, including static timing analysis and results review.
  • Use formal verification tools to check RTL and gate-level netlist equivalence, working with the design team to resolve any mismatches.
  • Define and implement assertions and checkers to ensure proper functionality and signal integrity at the module and chip levels.
  • Debug microchips using waveforms and logs, collaborating with design teams to address issues.
  • Automate verification tasks with Python scripts, including testbench creation, test case generation, and results analysis.
  • Participate in verification meetings, track issues, and ensure timely follow-ups.
  • Document and report verification progress, coverage metrics, and signoff status, maintaining up-to-date and accurate records.

Minimum Requirements:

  • Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field.
  • At least 5 years of experience in hardware engineering, silicon engineering, ASIC design verification, or a related role.
  • At least 2 years of experience with:
  • UVM (Universal Verification Methodology)
  • Testbench development
  • Synopsys VCS
  • System Verilog
  • AXI (Advanced eXtensible Interface)
  • ASIC Development

Why Join Us?

This is a unique opportunity to work with one of the top startups driving innovation in AI hardware. If you're ready to make an impact and join a revolutionary team, apply now or reach out to .

Date Posted: 28 April 2025
Job Expired - Click here to search for similar jobs