Description
Contract Hardware Engineer Mid.
Mountain View, CA 94043
12+ Months
Note: Design Verification Engineer with strong SV, UVM and AXI Experience.
Technical:
- Strong expertise along-with complex SoC/IP debug is must
- At-least 5+ years of experience in System Verilog HVL and C/C .
- AMBA AXI bus along-with ARM or C based processor
- Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure.
- Low Power Verification in UPF/net-list Simulation good to have
- Make/Perl/Python
- Ensure customer satisfaction.
- Reporting to customer on daily or weekly progress effectively
Education: