Job LocationSan Jose, CA - Onsite from day one.
Job ResponsibilitiesThe successful candidate will:
- Be a member of the design team overseeing full-chip Static Timing Analysis (STA) and collaborating with physical design and Design for Test (DFT) teams to close full-chip timing in multiple timing modes.
- Have the option to engage in block-level RTL design or block/top-level IP integration.
- Develop efficient methodologies to promote block-level SDCs to full-chip, and bring full-chip SDC changes back to block level.
- Ensure correctness and quality of SDCs early in the design cycle through effective methodology development and application.
- Review block-level SDCs and clocking diagrams, mentoring other RTL design owners on SDC development.
- Create full-chip clocking diagrams and related documentation.
Minimum Qualifications - Bachelor's Degree in Electrical or Computer Engineering with 7 years of ASIC or related experience, or Master's Degree in Electrical or Computer Engineering with 5 years of ASIC or related experience.
- Experience with block/full-chip SDC development in functional and test modes.
- Proficiency in Static Timing Analysis and experience with STA tools like PrimeTime/Tempus.
- Understanding of digital design concepts such as clocking and asynchronous boundaries.
- Experience with synthesis tools (e.g., Synopsys DC/DCG/FC) and Verilog/System Verilog programming.
Preferred Qualifications - Experience with constraint analyzer tools such as TCM (Timing Constraint Manager from Synopsys) and CCD (Conformal Constraint Designer from Cadence).
- Experience with Spyglass CDC and glitch analysis.
- Experience using Formal Verification tools such as Synopsys Formality and Cadence LEC.
- Proficiency in scripting languages such as Python, Perl, or TCL.
BenefitsWe offer a comprehensive benefits package, including:
- Medical, Vision, and Dental coverage.
- 401K plan.
- Employee Assistance Program (EAP) services.
Equal Employment OpportunityWe provide equal employment opportunities to all employees and applicants, prohibiting discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws.