The
Compiler Development Engineer will play a crucial role in designing and implementing various components of our MLIR-based compiler stack. You will also be involved in integrating new front ends to the compiler, focusing on embedded digital signal processing and TinyML applications.
This is a fantastic opportunity to be at the forefront of applications for cutting-edge hardware while collaborating with a highly skilled interdisciplinary team.
If you are an engineer eager to contribute to energy-efficient applications and want to make an immediate impact, we encourage you to apply.
Key Responsibilities - Develop new compiler features aimed at enhancing overall energy efficiency while ensuring programmability. These features may include:
- Efficient's innovative dataflow ISA
- Source-level debugging tools
- Optimizations for dataflow graphs
- Addressing hardware constraints like timing and power consumption
- Placement and routing of applications onto Efficient's architecture
- Data visualization tools
- Create unit and integration tests to identify and resolve functional and performance compiler issues.
- Collaborate with various software frameworks (such as Tensorflow and CMSIS-DSP) to deliver a high-quality API for our custom hardware.
- Diagnose and rectify functional and performance-related challenges within the compiler system.
- Partner with the hardware and physical design team to comprehend and enhance chip architecture while proposing future improvements.
- Work closely with the embedded team to grasp the problem domain and deliver finely-tuned compiler solutions.
Required Qualifications & Experience Requirements - 4+ years of experience in C development.
- 2+ years of post-graduate experience in compiler work.
- Experience with compiler frameworks such as LLVM, MLIR, or equivalents.
- A Bachelor's degree is required; a Master's degree in Computer Science or a related field is preferred.
- Strong understanding of computer architecture and optimization techniques.
- Proficiency with industry-standard development and debugging tools, including GDB.
- Great attention to detail, strong work ethic, capability to manage multiple projects simultaneously, and effective communication skills.
- Excellent problem-solving abilities.
Desired Qualifications & Experience Requirements - Familiarity with FPGA compilation and/or place-and-route algorithms.
- Experience with debug symbol tables such as DWARF.
- Understanding of Verilog, System Verilog, or VHDL.
- Solid knowledge of computer architecture.