Test Engineer

Smyrna, Georgia

The Georgia Tech Research Institute
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Overview The Georgia Tech Research Institute (GTRI) is the nonprofit, applied research division of the Georgia Institute of Technology (Georgia Tech).Founded in 1934 as the Engineering Experiment Station, GTRI has grown to more than 2,900 employees, supporting eight laboratories in over 20 locations around the country and performing more than $940 million of problem-solving research annually for government and industry.GTRI's renowned researchers combine science, engineering, economics, policy, and technical expertise to solve complex problems for the U.S. federal government, state, and industry. Georgia Tech's Mission and Values Georgia Tech's mission is to develop leaders who advance technology and improve the human condition. The Institute has nine key values that are foundational to everything we do: Students are our top priority. We strive for excellence. We thrive on diversity. We celebrate collaboration. We champion innovation. We safeguard freedom of inquiry and expression. We nurture the wellbeing of our community. We act ethically. We are responsible stewards. Over the next decade, Georgia Tech will become an example of inclusive innovation, a leading technological research university of unmatched scale, relentlessly committed to serving the public good; breaking new ground in addressing the biggest local, national, and global challenges and opportunities of our time; making technology broadly accessible; and developing exceptional, principled leaders from all backgrounds ready to produce novel ideas and create solutions with real human impact. Location Smyrna, GA (Metro Atlanta) Project/Unit Description The Sensors and Electromagnetic Applications Laboratory (SEAL) Command, Control, and Communications Division (C3D) is looking for a senior Electrical Engineer with hardware and RF test experience who is eager and capable of supporting the testing of innovative communications and data link systems for the DoD. The Division's projects require the integration of communications hardware onto prototype and fielded systems. Many of these systems involve analog and digital board-level tests, system-level tests, and RF test from HF to C-Band. Demonstrating system verification against design requirements is essential to successful delivery. The ideal candidate is a mid-level engineer with a desire to work closely with design and test teams to take projects quickly from concept to fielding. A thorough understanding of requirement development, testing, verification, and validation is desirable. Test automation and test scripting experience are desired. Job Purpose Test Engineers do the research, planning, development, and documentation of System Test activities including development of test cases, procedures, plans, and reports for sponsor research and development programs. This person should have experience working with complex systems and be strong in documentation as well. Key Responsibilities Guide team toward a test-driven development mode of execution. Developing plans for and facilitate successful execution of standard test programs, such as System Operational Verification Test (SOVT) events in accordance with guidance from the relevant SOVT Preparation and Execution Guide (SPEG). Research and diagnose system failures and isolate the source of problems between hardware components and software applications. Primary author of technical reports/presentations for projects of low/moderate complexity. Compile report input from other researchers and prepare final report deliverable. Additional Responsibilities Evaluating RF systems from a board to system level Testing and evaluating RF, analog, and digital systems. Performing RF modeling and simulation as a component of troubleshooting Interfacing with design teams to convey test results. Solving complex problems while utilizing troubleshooting and debugging skills Providing engineering support for prototype and production builds Identifying and designing efficient test methods Development and optimization of hardware-in-the-loop test beds Test automation scripting and optimization. Required Minimum Qualifications Experience testing RF hardware systems from HF to C-Band The candidate should be familiar with RF test equipment, digital test equipment, and common hardware laboratory test equipment. Experience with MATLAB, LabVIEW, Python, and/or another test automation tool or scripting language. Preferred Qualifications Active Secret Clearance Certified LabVIEW Architect (CLA) or Certified LabVIEW Developer (CLD) Certified MATLAB Associate or Professional Familiarity with DOORS databases Travel Requirements Education and Length of Experience This position vacancy is an open-rank announcement. The final job offer will be dependent on candidate qualifications in alignment with Research Faculty Extension Professional ranks as outlined in section 3.2.1 of the Georgia Tech Faculty Handbook 5 years of related experience with a Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, System Engineering, or a related field. 3 years of related experience with a Masters' degree in Electrical Engineering, Computer Engineering, Physics, System Engineering, or a related field. 0 years of related experience with a Ph.D. in Electrical Engineering, Computer Engineering, Physics, System Engineering, or a related field. U.S. Citizenship Requirements Due to our research contracts with the U.S. federal government, candidates for this position must be U.S. Citizens. Clearance Type Required Candidates must be able to obtain and maintain an active security clearance. Benefits at GTRI Comprehensive information on currently offered GTRI benefits, including Health & Welfare, Retirement Plans, Tuition Reimbursement, Time Off, and Professional Development, can be found through this link: Equal Employment Opportunity The Georgia Institute of Technology (Georgia Tech) is an Equal Employment Opportunity Employer. The University is committed to maintaining a fair and respectful environment for all. To that end, and in accordance with federal and state law, Board of Regents policy, and University policy, Georgia Tech provides equal opportunity to all faculty, staff, students, and all other members of the Georgia Tech community, including applicants for admission and/or employment, contractors, volunteers, and participants in institutional programs, activities, or services. Georgia Tech complies with all applicable laws and regulations governing equal opportunity in the workplace and in educational activities. Georgia Tech prohibits discrimination, including discriminatory harassment, on the basis of race, ethnicity, ancestry, color, religion, sex (including pregnancy), sexual orientation, gender identity, gender expression, national origin, age, disability, genetics, or veteran status in its programs, activities, employment, and admissions. This prohibition applies to faculty, staff, students, and all other members of the Georgia Tech community, including affiliates, invitees, and guests. Further, Georgia Tech prohibits citizenship status, immigration status, and national origin discrimination in hiring, firing, and recruitment, except where such restrictions are required in order to comply with law, regulation, executive order, or Attorney General directive, or where they are required by Federal, State, or local government contract. All members of the USG community must adhere to the USG Statement of Core Values, which consists of Integrity, Excellence, Accountability, and Respect. These values shape and fundamentally support our University's work. Additionally, all faculty, staff, and administrators must also be aware of and comply with the Board of Regents and Georgia Institute of Technology's policies on Freedom of Expression and Academic Freedom. More information on these policies can be found here: Board of Regents Policy Manual University System of Georgia (usg.edu). Posted: 02/02/2024 Closes: 03/29/2024 Back
Date Posted: 23 March 2024
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